`timescale 1ns / 1ns

/***************************************************************
 * Copyright(C), 2022 蓝萌电子 All Rights Reserved.
 * ModuleName : top_UART_RX.v 
 * Date       : 2022年6月9日
 * Time       : 0:27:55
 * Author     : 沈玲玲
 * Version    : V1.0
 *      Version | Modify
 *      ----------------------------------
 *       v1.0    .....
 *   * Copyright: 2022 蓝萌电子 All Rights Reserved.
 *   *  
 *   * This software is licensed under terms that can be found in the LICENSE file
 *   * in the root directory of this software component.
 *   * If no LICENSE file comes with this software, it is provided GPL3.0.
 *   *  
 *   * Description:
 ***************************************************************/


/****************************************
  *  	Pin and Register Planner
  *  	引脚寄存器设置
 ****************************************/
module top_UART_RX
(
    input sys_clk,
    input sys_rst_n,
    input rxd,
	//write wire
    output wire [7:0] led_output
);

wire [7:0] rxd_data;
/****************************************
  *  			Main Code
  *  			主要代码
 ****************************************/
 
 //串口接收模块     
uart_rx u_uart_recv
(                 
    .sys_clk        (sys_clk), 
    .sys_rst_n      (sys_rst_n),
    
    .uart_rxd       (rxd),
    .uart_data      (rxd_data)
);

//LED灯
led u_led
(
    .input_led (rxd_data),
    .output_led (led_output),
    .sys_clk (sys_clk),
    .sys_rst_n (sys_rst_n)
);
 
 
endmodule
